1. 鎬庢牱灝哅atlab浜х敓鐨勬暟鎹浼犲叆FPGA
鍙浠ュ熷姪Matlab鐨勪覆鍙ｉ氳鐨勫嚱鏁般傜數鑴戜笂鍙浠ヨ喘涔頒竴涓猆SB-UART杞鎹㈠櫒涓嶧PGA榪炴帴銆
2. 浣犵殑AD鏁版嵁瀛樺湪FPGA涓鍘繪槸榪欎箞瀹炵幇鐨勶紵錛
AD鑺鐗囨槸TLC549錛孍P2c5t144鍗曠嚎鐨勪覆琛屾暟鎹浼犻併
鍏堜緥鍖栦竴涓猻dram controller錛屽啀鎵撲釜testbench錛岀劧鍚庡啀build image錛屽啀涓婃澘嫻嬭瘯銆傝繖鍙鑳芥槸姣旇緝蹇鐨勬柟寮忎簡銆傛渶濂借佸箂dram鐨勮誨啓鏃跺簭姣旇緝鐔熸倝錛岀劧鍚庝緥鍖栫殑controller鎵嶈兘姣旇緝闈犺氨錛屽傛灉鑳芥悶鍒皊dram鐨刡fm妯″瀷錛岄偅鍙鑳芥洿濂姐
AD杈撳嚭鐨勬暟鎹鐩存帴榪汧PGA錛屼笉綆℃槸楂橀烝D鐨勪覆琛岃緭鍑鴻繕鏄騫惰屽樊鍒嗘暟鎹錛孎PGA鐨処O閮藉彲浠ユ敮鎸併傝繘FPGA鍚庢暟鎹鍙浠ュ瓨鍦‵PGA鐨凚RAM閲岄潰銆
FPGA錛團ield錛峆rogrammable Gate Array錛夛紝鍗崇幇鍦哄彲緙栫▼闂ㄩ樀鍒楋紝瀹冩槸鍦≒AL銆丟AL銆丆PLD絳夊彲緙栫▼鍣ㄤ歡鐨勫熀紜涓婅繘涓姝ュ彂灞曠殑浜х墿銆傚畠鏄浣滀負涓撶敤闆嗘垚鐢佃礬錛圓SIC錛夐嗗煙涓鐨勪竴縐嶅崐瀹氬埗鐢佃礬鑰屽嚭鐜扮殑錛屾棦瑙ｅ喅浜嗗畾鍒剁數璺鐨勪笉瓚籌紝鍙堝厠鏈嶄簡鍘熸湁鍙緙栫▼鍣ㄤ歡闂ㄧ數璺鏁版湁闄愮殑緙虹偣銆
3. xilinx鐨刡it鏂囦歡鏍煎紡濡備綍鍐欏叆FPGA
褰撲綘鎯蟲妸bit鏂囦歡閫氳繃紼嬪簭鍐欏叆fpga鐨勬椂鍊欙紝浣犱細鍙戠幇鎬繪槸涓嶅廣傚洜涓篵it格寮忔槸bitgen鐢熸垚鐨刯tag鐢ㄧ殑格寮忋
浣跨敤impact宸ュ叿鑳藉熷畬鎴愯漿鎹銆
琛5-19 甯哥敤鐨刋ilixn FPGA閰嶇疆鏂囦歡格寮忓垪琛
濡傛灉浣犳兂閫氳繃浠ｇ爜鐩存帴璇誨彇錛屽氨闇瑕佷簡瑙ｆ枃浠剁粨鏋勪簡銆傜綉涓婃悳浜嗘悳錛屾病鏈夎繖綾葷殑搴旂敤銆傜壒灝嗙爺絀舵垚鏋滃啓涓嬫潵錛屼負鍚庢潵浜轟嬌鐢ㄦ柟渚褲
ushort siglengthchar[] sig
ushort version[00 01]
char a// type {a-e}
ushort project name length
char[] project namechar b
ushort xilinx fpga name length
char[] xilinx fpga namechar c
ushort date length
char[] date namechar d
ushort time length
char[] time namechar e